RFI techniques which are based on automatic gain control, particularly a type of control referenced under the general heading of Smart AGC have been examined previously and are now the subject of U.S. Pat. No. 5,379,445. The Smart AGC concept is shown in a device 10 which is illustrated in simplified form in FIG. 1A. The disclosure of U.S. Pat. No. 5,379,445 incorporated herein by reference. In the Figure, a wanted signal with additive interference is input to a time delay 11 having an adjustable time constant. The delayed signal is provided to a null zone envelope I/O unit 12, which has a characteristic response curve as illustrated in FIG. 1C. The input signal also is provided to a broad band envelope detector using a radiometer power meter 13, whose output serves as an input to a filter 14 having adjustable time constants. The output of filter 14 is input to the null zone envelope I/O 12 and acts to control the size of the null. In brief, however, the RFI suppression characteristics of the Smart AGC.TM. are provided by an active nonlinear device which is controlled by observation and processing of the input envelope.
The device disclosed in the above referenced U.S. Pat. No. 5,379,445 utilized a biased "hard limiter" device in the null zone. The device employed a "null zone" , i.e., a range of input voltages for which the output voltage is zero. There are many different realizations of null zone nonlinearities, but the biased hard limiter is easy to implement and has been analyzed extensively.
A subsequent improvement over the above mentioned device is described in a U.S. patent application entitled "Voltage-variable Biased Inverting Limiter for RFI Suppression Overview" filed on Sep. 30, 1994 and naming Donald Arnstein and Todd Czerner as inventors. According to that invention, an enhanced nonlinear signal processor for RFI suppression uses a biased inverting limiter circuit. An illustration of that system is provided in FIG. 18, where a single stage implementation is shown.
In FIG. 1B, an input is provided to two parallel paths leading to a single output. The first path comprises a delay 21 and a linear booster amplifier 22. The second path comprises an envelope detector 23, whose output is provided in parallel to a tracker 24 and a delay 25. The tracker 24 outputs to an envelope to RF conversion circuit 26 which itself outputs to an RF threshold control circuit 28. The delay 25 outputs to a comparator 27, whose input is a max wanted signal amplitude adjusted for delay loss, and itself outputs to the RF threshold control circuit 28. The circuit 28 will profice an input in common to a biased inferting limiter 29 together with the output of the linear booster amplifier 22. A filter 29 is provided before the output of the stage.
The mechanism that sets the RF threshold voltage level in device 29 is an estimation of the which occurs in devices interference amplitude 23, 24, and 26. This estimation requires time to operate and as such must be equalized with delays in parallel paths 21, 25. Present-day high-frequency delay devices are lossy; hence, a linear booster amplifier 22 is required in the RF path. To ensure that the net insertion losses encountered by the tracking path and the RF path are as equal as possible, power compensation, in the form of either an amplifier or an attenuator, must be included in the envelope tracker 24.
After the tracker 24 has been power-compensated, the voltage along the tracking path is V.sub.t ; an additional 1.25 dB of attenuation is required to convert this to the RF threshold, since best level for V.sub.t,RF can be shown to be equal to =(3/2) V.sub.t. This factor of 1.25 dB can easily be accounted for in the power compensation at the output of the tracking filter; it has only been separately noted as "envelope to RF conversion" 26 for the purpose of illustration. The detected amplitude of the input signal-plus-interference-and-noise (the output of 23) is compared with a fixed maximum amplitude-determined from a prior knowledge of the wanted signal--to ascertain whether the interference is sufficiently high for the biased inverting limiter to have a beneficial effect. If the comparator 27 indicates that the interference does not exist or is not powerful enough to significantly affect the composite envelope, the RF threshold control circuit 28 sets RF threshold voltage V.sub.t,RF zero; otherwise, the control circuit 28 passes the value of RF threshold voltage estimated by the tracking path to the biased inverting limiter circuit 29. The biased inverting limiter circuit 29 processes the RF signal and threshold estimation, then passes the output to the first zone bandpass filter 30.
FIGS. 1C and 1D are illustrations of the instantaneous input vs. output characteristic (RF output vs RF input) for the nonlinear device hard limiter design where a biased null zone amplifier is used, and the where a biased inverting limiter is used, respectively in the Smart AGC device of FIG. 1B, as biased inverting limiter 29. As is seen in the figures, the biased null zone amplifier requires voltage-controlled conduction and has a clear null zone where the output voltage is zero for a range of input values. By contrast, the approach used in the biased inverting limiter avoids the operation around a zero output voltage value and instead uses inverting voltage values. One possible implementation requires of voltage controlled digital logic.
Both the hard limiter and the biased inverting limiter device employ active nonlinear devices which are controlled by processing the input envelope. FIG. 1E shows the previous approach, which is a one-step process. Either of the hard limiter or the biased inverting limiter would be used as a single stage.